1. Field of the Invention
The invention relates to a method for metallizing submicron contact holes in semiconductor bodies, in which metal is deposited in the submicron contact hole.
Such methods are increasingly necessary in semiconductor technology, since often a plurality of conductive layers, which are disposed with an increasing scale of integration in various planes, are used. Suitably structured, they serve as conductor tracks for electric currents. These tracks are insulated from one another by suitable nonconductive layers. If conductor tracks that are disposed in different planes are to be conductively connected to one another or to the Si substrate, then an opening (contact hole) must be structured in the intervening insulation layer. Sometimes, however, a direct connection is precluded for physical reasons. For instance, an n.sup.+ -doped silicon substrate cannot be contacted directly with an AlSi (1%) conductor track. That would create a diode instead of an ohmic contact, since the silicon that precipitates out is p.sup.+ - doped by aluminum. In such cases, an indirect connection must be made via an intermediate layer. Typically, these intermediate layers, which are intended to make an ohmic contact with the silicon, comprise titanium (Ti), titanium silicide (TiS.sub.x, where x.ltoreq.2) or titanium/tungsten (TiW). A barrier layer is also necessary, which preferably comprises titanium nitride (TiN) or TiW. Both of these materials exhibit relatively high impedance, with a specific resistance of 70 to 150 .mu..OMEGA.cm.
With increasing miniaturization of microelectronic components ("submicron technology"), the diameters of the connecting holes are becoming ever smaller, yet because at the same time better planarization of the insulation layers is necessary, they are also becoming ever deeper. For reasons of reliability and because of the trend to faster switching times and greater current densities, it is necessary that the connecting holes be metallized without shrink holes with a highly conductive material, while at the same time replicably low-impedance contacts to all the layer materials in question must also be assured.
As the hole aspect ratios continue to increase (i.e., the ratio between depth and diameter), this contact metallizing can no longer be done by deposition of the usual layer construction (such as Ti/TiN/W), since current sputtering methods do not allow conformal deposition for Ti/TiN and thus always leave behind a negative blank angle, which even with conformal tungsten CVD leads to shrink hole formation. If one considers that for a contact hole diameter of 0.3 .mu.m, for instance, at least 50 nm of Ti and 80 nm of TiN must be deposited in order to achieve an adequate, cohesive layer even at the bottom of the contact holes, then all that remains for the low-impedance, current-carrying tungsten is a minimum residual diameter of contact hole of less than 0.1 .mu.m. Shrink-hole-free filling of the hole is thus precluded. Moreover, this described process sequence is expensive and time-consuming.
In the known, conventional metallizing process (sputtering), one or more metal layers (such as AlSi or Ti/TiN/AlSiCu) are deposited by physical processes (such as sputtering or vapor deposition) and structures are created from them by suitable photographic and etching steps. Because of the poor edge coverage of these methods, this contact metallizing, even at aspect ratios of approximately 1, is feasible only with additional process steps (such as flaring or beveling of the upper half of the contact hole) and makes subsequent processes (such as planarization) more difficult. For metallizing in contact holes with aspect ratios &gt;1 and at elevated current densities, it can no longer be used reliably. Further developments in sputtering technology, such as collimated sputtering (i.e., oriented deposition by means of suitable, for instance mechanical, apertures)--as described, for instance, in P. Burggraaf, Semiconductor International, Dec. 1990, p. 28--do produce thicker layers at the bottom of the contact hole than conventional processes, but also cause the resultant aspect ratios to increase still more. This is so because the thickness of the layer deposited on the horizontal insulator surface always exceeds the thickness of the layer at the bottom of the contact hole. Hence the demands for conformity and planarization in the ensuing processes only become more stringent.
Metallizing of contacts by full-surface CVD tungsten deposition (using WF.sub.6 /H.sub.2) and back-etching--described, for instance, in P. E. Riley and T. E. Clark, J. Electrochem. Soc. Vol. 138, No. 10 (1991), p. 3008--has progressed relatively far in industrial testing and application. However, it is a complicated and therefore expensive method, because is entails the following individual steps:
b1) sputtering of a contact layer (such as Ti) to produce a low-impedance contact zone at the boundary faces with silicon or aluminum. PA1 b2) sputtering of a barrier layer (such TiN or TiW), to prevent the reactive WF.sub.6 molecules from attacking the Ti, Al or Si layers. PA1 b3) full-surface, conformal deposition of the CVD tungsten layer, followed by an etching step, with which the metal is removed from the horizontal insulator layers. PA1 the necessity of replicable, efficient cleaning of the contact zones prior to the actual deposition, which becomes increasingly difficult as the aspect ratio of the connecting holes increases; PA1 the massive boundary face reactions, in particular upon contact with silicon, that occur when certain aggressive chemicals such as WF.sub.6 are used, and that lead to unacceptably high leakage currents in diodes and transistors; PA1 the resultant narrow process window, caused for instance by ready, frequent "nonselective" deposition on insulator surfaces because of the nucleation seeds that are located there; PA1 the variously deep connecting holes cannot be filled to the same extent (ideally as far as the upper edge of the insulator), or can be still filled only by means of other complicated provisions, since the filler material grows uniformly in the vertical direction from the contact bottom. PA1 placing a semiconductor body in a CVD chamber; and PA1 depositing metal in a submicron contact hole formed in the semiconductor body in a single CVD process inside the CVD chamber, the CVD process including a first step of depositing a titanium-rich layer (e.g. Ti, TiSi) and a second step of depositing a low-impedance TiSi.sub.2 layer. PA1 preceded by: cleaning the contact zones (either wet chemically or dry, as needed and depending on the substrate with a preferred chemical or physical component, if possible preferably in situ in multichamber systems, as described in U.S. Pat. No. 5,478,780 or German Patent Application DE-A 41 32 561); PA1 followed by: an annealing step between 450.degree. C. and 800.degree. C., preferably by means of RTP or in a vertical furnace, in order to assure a homogeneous, complete siliciding reaction at the boundary face between Si and CVD-Ti, as described in further detail for instance in U.S. Pat. No. 5,478,780.
Because of the poor edge coverage of the two sputtering processes (b1 and b2) required, these layers have to be deposited ever thicker as the aspect ratio increases, to obtain a just barely adequate layer thickness in the relative zones of the contact holes and thus to assure the barrier function.
The geometric situation at the outset for the (actually conformal) tungsten deposition becomes appreciably less favorable; shrink-hole-free filling of the holes is no longer possible, and moreover as the hole diameter decreases further, the resultant volumetric proportion of the low-impedance tungsten metal in the contact metallization drops. Even if conformally deposited CVD contact and barrier layers are available, as described for instance in U.S. Pat. No. 5,478,780 to Koerner et al. (corresp. European Patent Application EP 90 106 139), a complicated and expensive method remains, which appears practicable, if at all, in various chambers of a multichamber high-vacuum system.
If some other metal (such as aluminum) or a metalloid (such as TiN) is used instead of tungsten for the contact metallization, which substances can in principle also be conformally deposited using CVD methods (see for instance in U.S. Pat. No. 5,478,780), then the above statement again applies, since a multilayer metallizing must again be employed for similar reasons. This statement is especially significant when CVD-TiN is used. While, in principle, the feasibility of filling with a CVD-TiN plug is described in I. J. Raaijmakers and A. Sherman, Proceedings of 7.sup.th Int'l IEEE VLSI Multilevel Interconnection Conference, Santa Clara, Calif. 1990, nevertheless this method can be used solely for contacts in which beforehand, as in salicide (an abbreviation for self-aligned silicide) technology, the actual contact and transition zone was formed in a previous multistage process. The method described by Raaijmakers and Sherman cannot be used for contacts with polycrystalline and monocrystalline silicon (because of overly high transition resistances), nor can it be used to metallize via-holes (for the same reason and because of overly high process temperatures).
In the selective CVD of metals and silicides, the goal is that a certain highly conductive material grow selectively (that is, exclusively) on certain substrates to be contacted (such as Si, silicide or metal surfaces). If a suitable substrate for this purpose is present on the bottom of the connecting holes, then direct, shrink-hole-free filling of the holes is possible. In none of the methods named here explicitly or any other imaginable methods has it been possible until now to perform them in a permanently replicable way under production conditions, which is why these methods have not been used industrially.
Their major disadvantages are the following: